Phoenard
PHNCore.h
Go to the documentation of this file.
1 /*
2 The MIT License (MIT)
3 
4 This file is part of the Phoenard Arduino library
5 Copyright (c) 2014 Phoenard
6 
7 Permission is hereby granted, free of charge, to any person obtaining a copy
8 of this software and associated documentation files (the "Software"), to deal
9 in the Software without restriction, including without limitation the rights
10 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 copies of the Software, and to permit persons to whom the Software is
12 furnished to do so, subject to the following conditions:
13 
14 The above copyright notice and this permission notice shall be included in
15 all copies or substantial portions of the Software.
16 
17 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 THE SOFTWARE.
24 */
25 
43 #include <inttypes.h>
44 
45 #ifndef _PHN_CORE_
46 #define _PHN_CORE_
47 
48 /* SELECT button */
49 static const uint8_t SELECT_PIN = 38;
50 #define SELECT_DDR DDRD
51 #define SELECT_PORT PORTD
52 #define SELECT_IN PIND
53 #define SELECT_MASK _BV(PD7)
54 
55 /* Macro to check if the SELECT button is pressed */
56 #define isSelectPressed() ((SELECT_IN & SELECT_MASK) != SELECT_MASK)
57 
58 /* SPI SS/MOSI/MISO/SCK registers */
59 #define SPI_DDR DDRB
60 #define SPI_PORT PORTB
61 #define SPI_SS_MASK _BV(PB0)
62 #define SPI_MOSI_MASK _BV(PB1)
63 #define SPI_MISO_MASK _BV(PB2)
64 #define SPI_SCK_MASK _BV(PB3)
65 #define SPI_MASK (SPI_SS_MASK | SPI_MOSI_MASK | SPI_MISO_MASK | SPI_SCK_MASK)
66 
67 /*
68  * The initialization states of the SPI PORT/DDR
69  * SS_PIN = OUTPUT, HIGH
70  * SCK_PIN = OUTPUT, LOW
71  * MOSI_PIN = OUTPUT, LOW
72  * MISO_PIN = INPUT, LOW
73  */
74 #define SPI_INIT_DDR ((1 * SPI_SS_MASK) | (1 * SPI_MOSI_MASK) | (1 * SPI_MISO_MASK) | (0 * SPI_SCK_MASK))
75 #define SPI_INIT_PORT ((1 * SPI_SS_MASK) | (0 * SPI_MOSI_MASK) | (0 * SPI_MISO_MASK) | (0 * SPI_SCK_MASK))
76 
77 /* Micro-SD chip select (CS) */
78 static const uint8_t SD_CS_PIN = 10;
79 #define SD_CS_PORT PORTB
80 #define SD_CS_DDR DDRB
81 #define SD_CS_MASK _BV(PB4)
82 
83 /* External RAM HOLD (CS) */
84 #define EXSRAM_HOLD_PORT PORTK
85 #define EXSRAM_HOLD_DDR DDRK
86 #define EXSRAM_HOLD_MASK _BV(PK0)
87 
88 /* SIM908 */
89 static const uint8_t SIM_STATUS_PIN = 39;
90 static const uint8_t SIM_PWRKEY_PIN = 40;
91 static const uint8_t SIM_DTRS_PIN = 41;
92 static const uint8_t SIM_RI_PIN = 3;
93 
94 /* Bluetooth */
95 static const uint8_t BLUETOOTH_RESET_PIN = 47;
96 static const uint8_t BLUETOOTH_KEY_PIN = 12;
97 
98 /* WiFi */
99 static const uint8_t WIFI_PWR_PIN = 49;
100 
101 /* VS1053 Audio Decoder */
102 static const uint8_t VS1053_CARDCS_PIN = SD_CS_PIN;
103 static const uint8_t VS1053_PWR_PIN = 43;
104 static const uint8_t VS1053_CS_PIN = 45;
105 static const uint8_t VS1053_RESET_PIN = 46;
106 static const uint8_t VS1053_DCS_PIN = 8;
107 static const uint8_t VS1053_DREQ_PIN = 2;
108 static const uint8_t VS1053_GPIO_PIN = 11;
109 static const uint8_t VS1053_IRX_PIN = 48;
110 #define VS1053_IRX_PORT PORTL
111 #define VS1053_IRX_MASK _BV(PL1)
112 
113 /* LCD Data control pins */
114 static const uint8_t TFTLCD_BL_PIN = 44;
115 static const uint8_t TFTLCD_CS_PIN = 69;
116 static const uint8_t TFTLCD_RS_PIN = 68;
117 static const uint8_t TFTLCD_WR_PIN = 67;
118 static const uint8_t TFTLCD_RD_PIN = 66;
119 static const uint8_t TFTLCD_RESET_PIN = 65;
120 
121 /* LCD Touchscreen pins */
122 static const uint8_t TFTLCD_YP_PIN = 67;
123 static const uint8_t TFTLCD_XM_PIN = 68;
124 static const uint8_t TFTLCD_YM_PIN = 30;
125 static const uint8_t TFTLCD_XP_PIN = 31;
126 
127 /* LCD Data control registers */
128 #define TFTLCD_BL_PORT PORTL
129 #define TFTLCD_BL_DDR DDRL
130 #define TFTLCD_BL_MASK _BV(PL5)
131 
132 #define TFTLCD_RESET_PORT PORTK
133 #define TFTLCD_RESET_MASK _BV(PK3)
134 #define TFTLCD_RD_PORT PORTK
135 #define TFTLCD_RD_MASK _BV(PK4)
136 #define TFTLCD_WR_PORT PORTK
137 #define TFTLCD_WR_MASK _BV(PK5)
138 #define TFTLCD_RS_PORT PORTK
139 #define TFTLCD_RS_MASK _BV(PK6)
140 #define TFTLCD_CS_PORT PORTK
141 #define TFTLCD_CS_MASK _BV(PK7)
142 
143 /* LCD Data registers */
144 #define TFTLCD_DATA_DDR DDRC
145 #define TFTLCD_DATA_PORT PORTC
146 #define TFTLCD_DATA_IN PINC
147 
148 #endif